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COMMREQ status words 

declared in bit memory types 

must be byte-aligned.

In previous releases, the CPU allowed configuration of COMMREQ Status Words in bit memory 

types on a non-byte-aligned boundary. Even though the given reference was not bytealigned, the firmware would adjust it the next-lowest byte boundary before updating status 

bits, overwriting the bits between the alignment boundary and specified location. 

To ensure that the application operates as expected, release 3.50 requires configuration of 

COMMREQ Status Words in bit memory types to be byte-aligned. For example if the user 

specified status bit location of %I3, the CPU aligns the status bit location at %I1. Release 3.50 

firmware requires the user to specify the appropriate aligned address (%I1) to ensure that the 

utilized location is appropriate for their application. Note that the actual reference location 

utilized is not changed, but now is explicitly stated for the user.

STOP and RUN mode 

transition priority 

The PACSystems CPU receives requests to change between STOP and RUN mode from many 

different sources. These include (but are not limited to) Proficy Machine Edition, HMIs, the user 

application, and the RUN/STOP switch. Since there are many potential sources for a mode 

change request, it is possible to receive a new mode change request while another is already 

in progress. When this occurs, the CPU evaluates the priority of the new mode change 

request with the mode change that is in progress. If the new mode change request has an 

equal or higher priority than the one already in progress, the CPU transitions to the new 

mode instead of the one in progress. If, however, the new mode change request has a lower 

priority than the one in progress, the new mode request is discarded and the CPU completes 

the mode change that is in progress. The sweep mode priorities are (listed from highest to 

lowest priority): STOP HALT, STOP FAULT, STOP, and RUN. (Note: The IO ENABLED/DISABLED 

state is not part of the mode priority evaluation.) For example, a CPU is in RUN IO ENABLED 

mode and a Service Request 13 function block is executed to place the CPU into STOP IO 

DISABLED mode. Before the transition to STOP IO DISABLED is completed, the RUN/STOP 

switch is changed from RUN IO ENABLED to RUN IO DISABLED. In this case, the CPU ignores 

the new request from the RUN/STOP switch to go to RUN IO DISABLED mode because it is 

already processing a request to go to STOP IO DISABLED mode and STOP mode has a higher 

priority than RUN mode. 

Suspend IO function block 

does not suspend EGD

In a Series 90-70 the SUSPEND_IO function block suspends EGD in addition to IO Scan. 

In PACSystems controllers the SUSPEND IO suspends only the IO Scan.